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Overview

SmartDV’s USB 2.x Hub IP is a silicon-proven, fully featured Universal Serial Bus hub solution purpose-built for SoC designs requiring reliable, standards-compliant USB hub functionality across embedded, automotive, IoT, and consumer electronics applications. Fully compliant with USB 2.0, it delivers complete hub functionality supporting High Speed and Full Speed operation via 8-bit and 16-bit UTMI/ULPI interfaces, with both Single Transaction Translator (STT) and Multiple Transaction Translator (MTT) support — providing a proven, production-ready USB hub implementation for the most demanding embedded SoC designs.

Designed to address the full breadth of USB 2.x hub integration requirements, the IP supports Bulk, Control, Isochronous, and Interrupt transfers, dedicated control endpoint zero, configurable dual port RAM shared between endpoints, optional PIO mode for interrupt endpoints, downstream device connect and disconnect detection, and USB Suspend/Resume with Remote Wakeup. Its Link Power Management support, comprehensive test mode features, system bus Master/Target clock support, and complete error detection and handling give SoC teams a production-tested, spec-complete USB 2.x hub implementation that integrates cleanly with the widest range of USB host controllers and downstream devices.

Built for design flexibility and silicon efficiency, the IP core is highly configurable for both ASIC and FPGA implementations, with a strong focus on area optimization, power management, and peak performance. Its configurable endpoint architecture, UTMI/ULPI transceiver interface support, and clean host interface enable fast integration and confident design bring-up across a wide range of process nodes and target applications.

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USB 2.x Hub
Benefits
  • Full USB 2.x Hub FunctionalityComplete USB 2.0 hub implementation supporting HS and FS operation via 8-bit and 16-bit UTMI/ULPI transceiver interfaces
  • Single and Multiple Transaction Translator – STT and MTT support for efficient FS/LS device transaction scheduling behind a HS hub
  • All USB Transfer Types – Bulk, Control, Isochronous, and Interrupt transfer support with dedicated control endpoint zero and optional PIO mode for interrupt endpoints
  • Configurable Endpoint Architecture – Configurable dual port RAM shared between endpoints with flexible endpoint configuration for application-specific hub designs
  • Downstream Device ManagementDownstream device connect and disconnect detection for reliable plug-and-play hub operation
  • USB Power Management – USB Suspend/Resume, Remote Wakeup, and Link Power Management (LPM) for power-efficient hub operation
  • Test Mode Support – Complete USB 2.0 test mode features for manufacturing test and compliance validation
  • Comprehensive Error DetectionVarious error types detection and handling for robust hub operation
Compliance and Compatibility
  • Fully compliant with USB 2.0 specification (USB-IF); backward compatible with USB 1.1 and USB 1.0
  • Compatible with UTMI v1.05 and ULPI Revision 1.1 transceiver interfaces in 8-bit and 16-bit modes
  • Configurable SoC interface supporting AMBA AXI, AHB, APB, and custom wrappers for seamless integration
  • Compatible with ASIC and FPGA design flows across leading foundry process nodes
  • Compatible with all major EDA synthesis, simulation, and linting flows

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