SmartDV’s USB 1.x/2.x Verification IP is a comprehensive solution for verifying USB 1.1 and USB 2.0 interfaces, the foundational serial bus standard for peripheral connectivity across consumer, industrial, and embedded systems. Fully compliant with the USB 1.1 and USB 2.0 Specifications including all integrated Engineering Change Notices, it supports complete verification of USB Host and Device models across Standard USB 2.0, UTMI, UTMI+, ULPI, and Serial interfaces, low, full, and high speed operation, and up to 127 connected devices with completely configurable bus enumeration.
SmartDV’s USB 1.x/2.x VIP supports UVM, SystemVerilog, and Verilog, and integrates seamlessly into diverse verification environments. It is simulator-independent and compatible with all leading EDA simulators, providing flexibility across simulation platforms.
With complete USB 2.0 OTG verification covering SRP, HNP, HNP polling, and ADP protocols, all USB 2.0 transfer types, comprehensive error injection at packet and transaction levels, programmable timers for suspend, resume, and reset signaling, built-in functional coverage, and a complete test suite, SmartDV’s USB 1.x/2.x VIP enables verification teams to thoroughly validate USB interface designs for embedded controllers, peripherals, mobile devices, and any application requiring standard or On-The-Go USB connectivity.