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AI & HPC
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AXI to UCIe Bridge IP
Design IP
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CHI to UCIe Bridge IP
Design IP
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CXL (1.1/2.0/3.0) VIP
Simulation
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CXL 1.x Controller IP
Design IP
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CXL 2.x Controller IP
Design IP
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CXL 3.x Controller IP
Design IP
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CXL to UCIe Bridge IP
Design IP
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CXS to UCIe Bridge IP
Design IP
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DDR3 (3DS + DIMM + DFI) VIP
Simulation
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DDR3/3L Controller IP
Design IP
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DDR4 (3DS + DIMM + DB + RCD + DFI) VIP
Simulation
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DDR4 Controller IP
Design IP
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DDR5 (DIMM + NVRAM + DFI) VIP
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DDR5 Controller IP
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eCPRI Controller IP
Design IP
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eCPRI VIP
Simulation
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