Contact Us
Overview

SmartDV’s FlexRay Controller IP is a silicon-proven, fully featured FlexRay communication controller solution purpose-built for SoC designs requiring deterministic, fault-tolerant automotive bus communication across x-by-wire, ADAS, and safety-critical vehicle control applications. Fully compliant with FlexRay Communications System Protocol Specification v3.0.1 (standardized as ISO 17458), it delivers complete FlexRay transmitter and receiver functionality with full-duplex operation, cluster wakeup and startup, and bit rates up to 10 Mbps, with support for non-standard speeds as well.

Designed for the demanding determinism and fault-tolerance requirements of safety-critical automotive networks, the IP supports monitor mode, bit alignment, and generation of both static and dynamic frame types for time-triggered and event-triggered communication respectively. Its comprehensive syntax error detection covering Frame ID, Header CRC, CRC, and over/undersize errors, alongside content error detection covering Cycle Count, Frame ID, Startup/Sync/Null frame errors with respect to both static and dynamic segments and Null frame reception, give automotive SoC teams a production-tested, spec-complete FlexRay controller implementation suited for legacy and current production x-by-wire and safety-critical vehicle network designs.

Built for design flexibility and silicon efficiency, the IP core is highly configurable for both ASIC and FPGA implementations, with a strong focus on area optimization, power management, and peak performance. Its parameterized architecture and clean host interface enable fast integration and confident design bring-up across a wide range of automotive process nodes and target applications.

Request Data Sheet
FlexRay Controller
Key Features
  • Full FlexRay Transmitter/Receiver Functionality – Complete FlexRay implementation per Protocol Specification v3.0.1 with full-duplex operation
  • Cluster Wakeup and Startup – Complete cluster wakeup and autonomous startup procedure support for reliable FlexRay network initialization
  • Flexible Bit Rate Support – 2.5 Mbps, 5 Mbps, and 10 Mbps standard bit rates with support for non-standard custom speeds
  • Monitor Mode – Dedicated monitor mode for network diagnostics and bus traffic observation without active participation
  • Static and Dynamic Frame Generation – Complete static frame generation for time-triggered communication and dynamic frame generation for event-triggered communication
  • Comprehensive Syntax Error Detection – Frame ID error (Frame ID = 0), Header CRC error, CRC error, and over/undersize frame error detection
  • Comprehensive Content Error Detection – Cycle Count error, Frame ID error, Startup/Sync/Null frame errors with respect to both static and dynamic segments, and Null frame reception detection
  • Bit Alignment – Complete bit alignment support for reliable frame synchronization
  • Transmit and Receive Command Interface – Dedicated transmit and receive commands allowing the user to control FlexRay data transfer
Compliance and Compatibility
  • Fully compliant with FlexRay Communications System Protocol Specification v3.0.1
  • Standardized equivalent to ISO 17458 series (Road vehicles – FlexRay communications system)
  • Configurable SoC interface supporting AMBA AXI, AHB, APB, and custom wrappers for seamless integration
  • Compatible with ASIC and FPGA design flows across leading foundry process nodes
  • Compatible with all major EDA synthesis, simulation, and linting flows

Request Datasheet