SmartDV’s AMBA DTI Verification IP is a comprehensive solution for verifying the Arm Distributed Translation Interface, a scalable point-to-point messaging protocol aligned with the Arm System MMUv3 architecture for address translation services. Fully compliant with the AMBA DTI Protocol Specification Issue J and backward compatible with earlier issues, it supports complete verification of both DTI-TBU, defining communication between Translation Buffer Units and the Translation Control Unit, and DTI-ATS, defining communication between PCIe Root Complexes with Address Translation Services and the Translation Control Unit, across all supported protocol versions including DTI-TBUv5 and DTI-ATSv5.
SmartDV’s AMBA DTI VIP supports UVM, SystemVerilog, and Verilog, and integrates seamlessly into diverse verification environments. It is simulator-independent and compatible with all leading EDA simulators, providing flexibility across simulation platforms.
With support for multistage address translation, cache model verification, MPAM, expanded Physical Address Space support, protected mode attributes, PCIe ATS integration, on-the-fly protocol checking, built-in functional coverage, and a complete test suite, SmartDV’s AMBA DTI VIP enables verification teams to thoroughly validate memory translation subsystem designs for mobile, automotive, AI, data center, and cloud computing SoC applications.
