SmartDV’s MIPI SPMI Slave to AXI Bridge IP is a silicon-proven, high-performance power management interface bridge solution purpose-built for SoC designs requiring seamless connectivity between an external SPMI master controller and an AMBA AXI-based on-chip interconnect. Fully compliant with MIPI SPMI v2.0 and AMBA AXI4, it enables external devices to directly access the internal AXI bus via a standard SPMI master interface, providing a standards-compliant, minimal-pin path for power management controllers to access the full AXI address space in high-performance SoC designs.
By bridging the SPMI slave interface directly to the AXI bus fabric with both AXI Master and AXI Slave capabilities, it delivers a versatile, bidirectional bridge solution that goes beyond simple register access to enable comprehensive AXI bus interaction from an external SPMI master. Its support for Authentication Command Sequences, Device Descriptor Blocks, slave request hold, and optional glitch suppression gives SoC and PMIC teams a production-tested, feature-rich bridge implementation suited for the most demanding mobile and automotive power management integration scenarios.
Built for design flexibility and silicon efficiency, the IP core is highly configurable for both ASIC and FPGA implementations, with a strong focus on area optimization, power management, and peak performance. Its parameterized architecture and clean bridge interface enable fast integration and confident design bring-up across a wide range of mobile and automotive process nodes and target applications.
