SmartDV’s MIPI SPMI Synthesizable Transactor is a fully featured System Power Management Interface bus model purpose-built for hardware emulation and FPGA prototyping environments requiring fast, accurate, and highly configurable SPMI Master and Slave behavior during pre-silicon validation of mobile, IoT, and power management subsystem designs. Fully compliant with MIPI SPMI v2.0 and backward compatible with v1.0, it delivers complete Master and Slave functionality with the flexibility to operate as Master, Slave, or both simultaneously, across all standard SPMI topologies including multi-master and multi-slave configurations, giving validation teams a drop-in synthesizable SPMI transactor ready for rapid integration into emulation and prototyping flows.
Designed for the speed and visibility demands of emulation and FPGA prototyping rather than ASIC tape-out, the transactor emphasizes fast bring-up, fine-grained controllability, and on-the-fly protocol checking over area or power optimization. It supports all SPMI frame types, all SPMI commands, ACK/NACK generation per v2.0, master bus connection via SSC detection, bus idle, and bus arbitration, slave alert bit and slave request hold, extended register read/write, master and slave arbitration, device enumeration, half-speed operation, and glitch injection and detection on both SDATA and SCLK at all positions, enabling validation teams to exercise corner-case SPMI behavior that is difficult to reach with production RTL alone.
Built for fast compile times and efficient resource utilization on hardware emulation and FPGA prototyping platforms, the transactor is fully synthesizable and platform-independent, deploying without modification across any major emulation or prototyping environment. Its bus-accurate timing, read data comparison against expected results, comprehensive Master and Slave error generation, and status counters for all bus events enable rapid deployment for early software bring-up and power management system-level validation regardless of the underlying emulation platform.
