SmartDV’s MIPI I3C Verification IP is a comprehensive solution for verifying the MIPI Improved Inter-Integrated Circuit bus, the successor to I2C providing a unified high-performance, very-low-power two-wire serial interface for sensor, actuator, and system management applications. Fully compliant with MIPI I3C v1.2 and MIPI I3C HCI v1.2, it supports complete verification of I3C controller and target components across all topologies, all SDR and HDR messaging modes including HDR-DDR, HDR-TSL, HDR-TSP, and HDR-BT, multi-lane data transfer in DUAL and QUAD configurations, Device to Device tunneling, all Common Command Codes, and the complete I3C Host Controller Interface with PIO and DMA modes, covering all descriptor types, command rings, and error handling.
SmartDV’s MIPI I3C VIP supports UVM, SystemVerilog, and Verilog, and integrates seamlessly into diverse verification environments. It is simulator-independent and compatible with all leading EDA simulators, providing flexibility across simulation platforms.
With legacy I2C device co-existence, dynamic and static address assignment, in-band interrupt, hot-join, secondary master request support, comprehensive error injection across all defined error types, glitch insertion, bus-accurate timing, built-in functional coverage, and a complete test suite, SmartDV’s MIPI I3C VIP enables verification teams to thoroughly validate I3C bus interface designs for smartphones, IoT devices, automotive ECUs, data center management, industrial sensors, and any application requiring high-performance low-pin-count serial connectivity.
