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Overview

SmartDV’s SDIO Device IP is a silicon-proven, fully featured Secure Digital I/O solution purpose-built for SoC designs requiring reliable, high-speed SD and SDIO device-side connectivity across mobile, IoT, consumer electronics, and embedded applications. Fully compliant with SD Physical Layer Specification v9.00 and SDIO Part E1 Specification v3.00, it delivers complete device-side SD and SDIO functionality with support for 1-bit, 4-bit SD bus mode, and SPI bus mode, covering all UHS-I speed modes from SDR12 through SDR104 and all SD card capacity categories from SDSC through SDXC up to 2TB.

Designed to address the full breadth of SDIO device integration requirements, the IP supports all command and response types, CRC7 and CRC16 generation and checking, single byte, single block and multiple block transfer operations, multiple IO functions with one memory, asynchronous interrupt to host controller, suspend and resume operation, and read wait control. Its support for switch function commands, block count setting (CMD23), and direct commands during data transfer gives SoC teams a production-tested, spec-complete SDIO device implementation that integrates cleanly with the widest range of SD host controllers and system designs.

Built for design flexibility and silicon efficiency, the IP core is highly configurable for both ASIC and FPGA implementations, with a strong focus on area optimization, power management, and peak performance. Its parameterized architecture and clean host interface enable fast integration and confident design bring-up across a wide range of process nodes and target applications.

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SDIO Device
Key Features
  • Full SDIO Device Functionality – Complete device-side SD and SDIO implementation per SD Physical Layer v9.00 and SDIO Part E1 v3.00 supporting 1-bit, 4-bit SD bus mode, and SPI bus mode
  • Full UHS-I Speed Mode Support – SDR12, SDR25, DDR50, SDR50, and SDR104 modes for maximum SD interface performance
  • Complete Capacity Support – SDSC up to 2GB, SDHC up to 32GB, and SDXC up to 2TB for broad storage capacity coverage
  • Robust Data Integrity – CRC7 generation and checking for command/response and CRC16 generation and checking for data transfer
  • Flexible Transfer Operations – Single byte, single block, and multiple block transfer operations with block count setting (CMD23) and direct commands during data transfer
  • Multiple IO Function Support – Multiple IO functions with one memory, asynchronous interrupt to host controller, and suspend and resume operation
  • Read Wait Control – Read wait control operation support for flexible data transfer timing management
  • Complete Command Support – All SD and SDIO command and response types including switch function command for comprehensive host controller compatibility
Compliance and Compatibility
  • Fully compliant with SD Physical Layer Specification v9.00; backward compatible with v3.01 and earlier versions
  • Fully compliant with SD Specifications Part E1 SDIO v3.00 and earlier versions
  • Supports SDSC, SDHC, and SDXC memory capacity categories
  • Configurable SoC interface supporting AMBA AXI, AHB, APB, and custom wrappers for seamless integration
  • Compatible with ASIC and FPGA design flows across leading foundry process nodes
  • Compatible with all major EDA synthesis, simulation, and linting flows

Request Datasheet