SmartDV’s HDMI Sink IP is a fully featured HDMI receiver solution purpose-built for SoC designs requiring reliable, standards-compliant video and audio reception across TV, AV receiver, projector, and display applications. Compliant with HDMI Specification 2.2 and backward compatible with 2.1, 2.0b, and 1.4b, and compatible with DVI and Dual-Link DVI standards, it delivers complete HDMI Sink functionality supporting 8, 10, 12, and 16-bit pixel output, RGB, YCbCr444, YCbCr422, and YCbCr420 colorimetric formats, and 3D video formats up to 4Kx2K, 5Kx2K, 8Kx4K, and 10Kx4K resolutions.
Designed for the practical integration requirements of modern display and AV receiver SoC designs, the IP supports decompression of Video Transport per VESA DSC 1.2a, 340 Mcsc to 600 Mcsc TMDS Character Rate, FRL Lane link rates of 3, 6, 8, 10, and 12 Gbps, Variable Refresh Rate (VRR), and Fast Vactive (FVA). Its 2, 8, and 32-channel audio format support, 8b10b decoding on the TMDS channel, Fixed Rate Link reception with 16b18b decoding, Forward Error Correction (FEC), and support for HDCP 1.4, 2.2, and 2.3 give display SoC teams a production-ready HDMI Sink implementation for the full range of modern high-resolution display applications.
Built for design flexibility and silicon efficiency, the IP core is highly configurable for both ASIC and FPGA implementations, with a strong focus on area optimization, power management, and peak performance. Its parameterized lane architecture and clean host interface enable fast integration across a wide range of process nodes and target applications.
