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Overview

SmartDV’s HDCP 2.x Receiver IP is a silicon-proven, fully featured High-bandwidth Digital Content Protection receiver solution purpose-built for SoC designs requiring standards-compliant content protection authentication across 4K and 8K consumer electronics, broadcast, and display applications. Fully compliant with HDCP Specification up to Revision 2.3 and backward compatible with Revision 2.2, it delivers complete HDCP receiver functionality compatible with DisplayPort, HDMI, and MHL content interfaces, supporting resolutions up to 8K@60Hz with industry-standard AES-128 encryption.

Designed for the practical integration requirements of modern 4K and 8K display SoC designs, the IP supports user key loading for authentication, hardware or API-generated cipher text for the Authentication Protocol, and the complete authentication and key exchange sequence including Authentication and Key Exchange, Locality Check, Session Key Exchange, Link Integrity Check, and Key Derivation. Its support for 1, 2, 4, 8, and 16 cipher symbols per clock, AES with 128-bit key length, and RSA decryption for authentication give display SoC teams a production-tested, spec-complete HDCP 2.x receiver implementation for standards-compliant next-generation content protection reception.

Built for design flexibility and silicon efficiency, the IP core is highly configurable for both ASIC and FPGA implementations, with a strong focus on area optimization, power management, and peak performance. Its parameterized architecture and clean host interface enable fast integration across a wide range of process nodes and target applications.

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HDCP 2.x Receiver
Benefits
  • Full HDCP 2.x Receiver Functionality – Complete receiver implementation up to HDCP Specification Revision 2.3, backward compatible with Revision 2.2
  • Multi-Interface Compatibility – Compatible with DisplayPort, HDMI, and MHL content protection interfaces
  • Complete Authentication and Key Exchange – Full sequence including Authentication and Key Exchange, Locality Check, Session Key Exchange, Link Integrity Check, and Key Derivation
  • Flexible Cipher Throughput – Configurable 1, 2, 4, 8, and 16 cipher symbols per clock for scalable performance
  • AES-128 Encryption – AES encryption with 128-bit key length for standards-compliant content protection
  • RSA Authentication – RSA decryption implementation for standards-compliant HDCP 2.x authentication
  • Hardware or API Cipher Generation – Cipher text generation via hardware or API for flexible Authentication Protocol integration
  • 8K Content Support – Compatible with resolutions up to 8K@60Hz per HDCP 2.3 specification
Compliance and Compatibility
  • Fully compliant with HDCP Specification up to Revision 2.3; backward compatible with Revision 2.2
  • Compatible with DisplayPort, HDMI, and MHL content protection interfaces
  • Supports resolutions up to 8K@60Hz
  • Configurable SoC interface supporting AMBA AXI, AHB, APB, and custom wrappers for seamless integration
  • Compatible with ASIC and FPGA design flows across leading foundry process nodes
  • Compatible with all major EDA synthesis, simulation, and linting flows

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