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eDP Transmitter IP
Design IP
Overview

SmartDV’s eDP (Embedded DisplayPort) Transmitter IP is a high-performance solution designed for next-generation display applications in mobile, automotive, and embedded systems. It supports VESA Embedded DisplayPort specifications including eDP v1.3, v1.4, v1.4a, and v1.5, enabling high-bandwidth video and audio transmission with support for advanced features such as Panel Self Refresh (PSR), Display Stream Compression (DSC) as per VESA DSC v1.2, and full AUX Channel management.

Designed for flexibility, the IP core is highly configurable to meet specific design requirements, supporting both ASIC and FPGA implementations while optimizing for area, power, and performance. Its streamlined architecture allows seamless integration into SoCs, display controllers, or GPU pipelines, ensuring reliable and efficient interface connectivity to embedded display panels.

eDP Transmitter
Benefits
  • High-Resolution Embedded Display Output – Transmits video streams up to 8K resolution over 1, 2, or 4 Main Link lanes, supporting link rates up to HBR3 (8.1 Gbps per lane)
  • Advanced Compression and Protection – Supports Display Stream Compression (DSC) to reduce bandwidth requirements and HDCP 1.4/2.2 for secure content transmission
  • Reliable Signal Quality – Integrates Forward Error Correction (FEC) and adaptive link training for enhanced signal integrity and robustness in embedded environments
  • Low-Power Display Applications – Enables power-saving features including Panel Self Refresh (PSR/PSR2) and deep sleep modes for battery-sensitive platforms
  • Full Protocol Stack Support – Includes video stream mapping, main link packetization, lane skew management, and AUX channel command handling
  • Seamless System Integration – Designed for easy connectivity to SoC video pipelines (e.g., RGB/YUV/AXI-stream), with interfaces to PHY and controller logic
Compliance and Compatibility
  • Fully compliant with VESA Embedded DisplayPort (eDP) Specification, up to version 1.5
  • Supports DisplayPort Link Layer, AUX Channel, DSC, FEC, HDCP 1.4/2.2, and PSR/PSR2 standards
  • Compatible with all major EDA synthesis, simulation, and linting flows