SmartDV’s V-by-One Verification IP is a comprehensive solution for verifying V-by-One HS, the THine Electronics high-speed serial display interface enabling fast, reliable video and data transmission over inexpensive twisted-pair copper cables for flat panel televisions, automotive infotainment, industrial cameras, and machine vision applications. Fully compliant with V-by-One HS Standard Version 1.52 and backward compatible with versions 1.2, 1.3, and 1.4, it supports complete verification of V-by-One Transmitter and Receiver modes across up to 32 serial lanes, all byte lengths, color depths, and resolutions, and 10-bit, 20-bit, and 40-bit parallel interfaces.
SmartDV’s V-by-One VIP supports UVM, SystemVerilog, and Verilog, and integrates seamlessly into diverse verification environments. It is simulator-independent and compatible with all leading EDA simulators, providing flexibility across simulation platforms.
With 8b/10b encoding with disparity and invalid code insertion, scrambler support as defined in the V-by-One HS specification, skip and ALN training pattern support, comprehensive error injection and detection, built-in functional coverage, and a complete test suite, SmartDV’s V-by-One VIP enables verification teams to thoroughly validate V-by-One interface designs for 4K and 8K televisions, OLED and LCD display panels, automotive displays, industrial and machine vision cameras, and any application requiring high-speed, low-EMI serial video transmission.
