SmartDV’s V-By-One Synthesizable Transactor is a fully featured V-by-One HS video interface bus model purpose-built for hardware emulation and FPGA prototyping environments requiring fast, accurate, and highly configurable V-by-One HS transmitter and receiver behavior during pre-silicon validation of flat panel display, automotive infotainment, industrial camera, and machine vision SoC designs. Fully compliant with V-by-One HS v1.52, it delivers complete transmitter and receiver functionality supporting 1, 2, 4, 8, 16, and 32 lane configurations at data rates from 600 Mbps to 4 Gbps per lane, with comprehensive support for all standard video formats, resolutions, and refresh rates up to 4K at 240Hz, giving validation teams a drop-in synthesizable V-by-One transactor ready for rapid integration into emulation and prototyping flows.
Designed for the speed and visibility demands of emulation and FPGA prototyping rather than ASIC tape-out, the transactor emphasizes fast bring-up, fine-grained controllability, and on-the-fly protocol checking over area or power optimization. It supports RGB 4:4:4, YCbCr 4:4:4, RGBW/Y 4:4:4:4, and YCbCr 4:2:2 color formats across 16 to 40 bits per pixel, multi-byte mode configurations of 3, 4, and 5 bytes, configurable pixels per clock from 1 to 8, 8b/10b encoding and decoding, scrambling and descrambling, lane deskew, flexible output data widths of 20, 40, and 80 bits, and 3D flag support for color and control data mapping, enabling validation teams to exercise corner-case V-by-One HS behavior that is difficult to reach with production RTL alone.
Built for fast compile times and efficient resource utilization on hardware emulation and FPGA prototyping platforms, the transactor is fully synthesizable and platform-independent, deployable on any hardware emulation or FPGA prototyping platform. Its comprehensive error detection and reporting across all V-by-One HS protocol error types, combined with testbench notification of significant events, warnings, timing, and protocol violations, enable rapid deployment for early software bring-up and display system-level validation regardless of the underlying emulation platform.
