Contact Us

UFS 3.x Device IP

Design IP
Overview

SmartDV’s UFS (Universal Flash Storage) 3.x Device IP is a silicon-proven, high-speed storage interface solution designed for flash memory controllers and embedded storage subsystems in mobile, automotive, and high-performance embedded systems. Fully compliant with JEDEC UFS 3.1 specifications, MIPI M-PHY v4.1, and MIPI UniPro v1.8 standards, it enables seamless, high-throughput communication with UFS 3.1-compatible host controllers at up to 11.6 Gbps per lane. With a proven track record in production silicon, it provides a reliable and mature foundation for device-side storage interface designs.

For flash memory controller teams, silicon-proven device-side IP removes one of the most significant risks in the development cycle. SmartDV’s UFS 3.x Device IP has been validated in real customer silicon, giving teams the confidence to commit to a device-side implementation that is production-tested and ready for mass deployment.

Built for design flexibility and silicon efficiency, the IP core is highly configurable for both ASIC and FPGA implementations, with a strong focus on area optimization, power management, and peak performance. Combined with its silicon-proven status, its parameterized architecture and comprehensive documentation make it one of the lowest-risk device-side controller choices available for mobile and automotive flash memory designs.

UFS Device
Benefits
  • Full UFS 3.x Device Controller Support – Complete device-side implementation per JESD223D with all UPIU types including Command, Data, Query, Task Management, and Response
  • HS-Gear4 Dual-Lane Support – Up to 23.2 Gbps aggregate throughput via MIPI M-PHY v4.1 for high-speed storage access
  • Host Performance Booster (HPB) v1.0 & v2.0 – Reduces read latency and improves overall storage access efficiency
  • Advanced Power Management – Deep Sleep, Write Booster, and Performance Throttling for power-optimized operation
  • Comprehensive Partition Support – Multiple LUNs, Boot Partitions, RPMB, and Reliable Write for flexible storage management
  • Secure Storage Operations – Purge, Erase, and Write Protection including Permanent and Power-On Write Protection
  • Supports Unified Memory Extension – JESD220-1A (Version 1.1) for expanded memory configuration options
Compliance and Compatibility
  • Fully compliant with JEDEC JESD220E (UFS 3.1); backward compatible with UFS 3.0 and UFS 2.1
  • Compliant with MIPI M-PHY v4.1, MIPI UniPro v1.8, and UFS HCI (JESD223D)
  • Supports Unified Memory Extension JESD220-1A (Version 1.1)
  • Configurable SoC interface supporting AXI-4, APB, AXI Lite, and custom wrappers for seamless integration
  • Supports integration with third-party M-PHY and UniPro components
  • Compatible with ASIC and FPGA design flows across leading foundry process nodes
  • Compatible with all major EDA synthesis, simulation, and linting flows