SmartDV’s Ethernet Verification IP is a comprehensive solution for verifying Ethernet network interface designs across the complete IEEE 802.3 Ethernet standard family, from 100 Mbps through 800 Gbps. Fully compliant with IEEE 802.3df-2024 for 800G operation and IEEE 802.3-2022 as the consolidated base standard — covering all amendments from 10M through 400G — it supports complete verification of Ethernet TX BFM, RX BFM, and Monitor components across all defined MAC interfaces, physical layer coding schemes, and link rates, with support for the UNH test suite, all major upper layer protocols, and the complete IEEE Time-Sensitive Networking protocol suite.
SmartDV’s Ethernet VIP supports UVM, SystemVerilog, and Verilog, and integrates seamlessly into diverse verification environments. It is simulator-independent and compatible with all leading EDA simulators, providing flexibility across simulation platforms.
With comprehensive TSN protocol support, IEEE 1588 precision timing, Energy Efficient Ethernet, MACSEC, IPsec, RoCE, MDIO Clause 22 and 45 support, extensive error injection across all protocol layers, glitch injection, pause frame generation and detection, built-in functional coverage, and a complete UNH test suite, SmartDV’s Ethernet VIP enables verification teams to thoroughly validate Ethernet network interface designs for data center, AI infrastructure, automotive, industrial automation, telecommunications, and high-performance computing applications.