SmartDV’s Ethernet FlexE Verification IP is a comprehensive solution for verifying Flexible Ethernet designs, a technology that extends standard IEEE 802.3 Ethernet PHYs to support bonding, sub-rating, and channelization for flexible bandwidth provisioning in data center interconnect, metro transport, and telecommunications network applications. Fully compliant with OIF FlexE 3.0 and backward compatible with FlexE 2.2, 2.1, 2.0, and 1.0, it supports complete verification of FlexE mux and demux functions at the MAC layer across FlexE Groups composed of 100GBASE-R, 200GBASE-R, 400GBASE-R, and 800GBASE-R PHYs, covering FlexE bonding for higher aggregate rates, sub-rating for lower-than-PHY client rates, and channelization for carrying multiple independent client streams over a single FlexE Group.
SmartDV’s Ethernet FlexE VIP supports UVM, SystemVerilog, and Verilog, and integrates seamlessly into diverse verification environments. It is simulator-independent and compatible with all leading EDA simulators, providing flexibility across simulation platforms.
With comprehensive upper layer protocol support, CDR for serial protocols, glitch injection, extensive error injection across all protocol layers, UNH test suite coverage, pause frame generation and detection, built-in functional coverage, and a complete test suite, SmartDV’s Ethernet FlexE VIP enables verification teams to thoroughly validate FlexE network interface designs for hyperscale data center interconnect, metro transport networks, 5G fronthaul and backhaul, and AI networking infrastructure applications.