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Overview

SmartDV’s CPRI Controller IP is a silicon-proven, fully featured Common Public Radio Interface solution purpose-built for SoC designs requiring reliable, high-bandwidth fronthaul connectivity between Radio Equipment Controllers and Radio Equipment in wireless base station, small cell, and 5G NR infrastructure applications. Fully compliant with CPRI v7.1 and backward compatible with v7.0, v6.1, v6.0, v5.0, and v4.2, it delivers complete CPRI TX/RX controller functionality across all standard line bit rates from 614.4 Mbps through 24,330.24 Mbps, providing a proven, production-ready CPRI controller for the most demanding wireless fronthaul designs.

Designed to address the full breadth of CPRI controller requirements, the IP supports 8B/10B line coding for bit rates up to 9830.4 Mbps, 64B/66B line coding without RS-FEC for 8110.08, 10137.6, 12165.12, and 24330.24 Mbps, and 64B/66B with RS-FEC in all three alignment marker and scrambler combinations for 24330.24 Mbps. Its CPRI Hyperframe framing with IQ data, sync, C&M, and vendor-specific information interleaving, slow C&M HDLC channel at all standard bit rates from 240 kbps through 7680 kbps, fast C&M Ethernet channel, L1 Inband Protocol, hardware start-up state machine for both REC and RE nodes, and complete Link Maintenance including LOS, LOF, RAI, and SDI give wireless infrastructure SoC teams a production-tested, spec-complete CPRI controller.

Built for design flexibility and silicon efficiency, the IP core is highly configurable for both ASIC and FPGA implementations, with a strong focus on area optimization, power management, and peak performance. Its parameterized line rate architecture and clean host interface enable fast integration across a wide range of wireless infrastructure process nodes.

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CPRI Controller
Key Features
  • Full CPRI TX/RX Controller Functionality – Complete REC and RE node implementation per CPRI v7.1 supporting all standard line bit rates from 614.4 Mbps through 24,330.24 Mbps
  • Comprehensive Line Coding Support – 8B/10B for rates up to 9830.4 Mbps, 64B/66B without RS-FEC for 8110.08 through 12165.12 Mbps, and 64B/66B with RS-FEC in all alignment marker and scrambler combinations for 24330.24 Mbps
  • CPRI Hyperframe Framing – IQ data, sync, C&M, and vendor-specific information interleaving with 8, 16, and 32-bit IQ data width options
  • Sub-Channel Mapping – Slow C&M HDLC channel at all standard bit rates from 240 kbps through 7680 kbps with higher-layer negotiated rates, and fast C&M Ethernet channel
  • Hardware Start-Up State Machine – Complete L1 synchronization, protocol setup, and C&M plane setup for both REC and RE nodes
  • Link Maintenance – LOS detection, LOF detection, RAI detection, and SDI indication for complete CPRI link health monitoring
  • L1 Inband Protocol – L1 Inband Protocol support with parallel vendor-specific data interface for CPRI frame merging
Compliance and Compatibility
  • Fully compliant with CPRI v7.1; backward compatible with CPRI v7.0, v6.1, v6.0, v5.0, and v4.2
  • Supports both REC and RE node configurations
  • Configurable SoC interface supporting AMBA AXI, AHB, APB, and custom wrappers for seamless integration
  • Compatible with ASIC and FPGA design flows across leading foundry process nodes
  • Compatible with all major EDA synthesis, simulation, and linting flows

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