SmartDV’s SLVS-EC Transmitter IP is a fully featured Scalable Low Voltage Signaling with Embedded Clock transmitter solution purpose-built for CMOS image sensor SoC designs requiring high-speed, high-resolution image data transmission to DSP and FPGA host processors. Fully compliant with JIIA SLVS-EC v3.0 and backward compatible with v2.0, it delivers complete transmitter-side SLVS-EC functionality supporting up to 8 lanes at data rates from 1152 Mbps through 5000 Mbps across Baud Grades 1, 2, and 3, making it a strategic choice for high-resolution, high-frame-rate image sensors in automotive ADAS, industrial vision, and consumer camera applications.
Designed to address the demanding image data transmission requirements of modern CMOS image sensor designs, the IP supports all standard CIS-DSP system topologies including Basic, Multiple I/F, and Multiple CIS configurations, CIS Master frame synchronization with and without shared clock, multiple color formats from RAW8 through RAW16, embedded data transfer, and multiple stream transmission. Its 8B10B encoding, ECC, and CRC data integrity features combined with complete LINK and PHY Protocol Management give image sensor SoC teams a spec-complete, integration-ready SLVS-EC transmitter that supports the widest range of camera system configurations.
Built for design flexibility and silicon efficiency, the IP core is highly configurable for both ASIC and FPGA implementations, with a strong focus on area optimization, power management, and peak performance. Its parameterized lane architecture, configurable baud grade selection, and clean host interface enable fast integration and confident design bring-up across a wide range of advanced imaging process nodes and target applications.
