SD Express VIP

Simulation

Key Features Compliance and Compatibility Request a Datasheet

Overview

SmartDV’s SD Express Verification IP is a comprehensive solution for verifying the SD Express interface, the SD Association standard combining the legacy SD interface with PCI Express and NVMe to deliver SSD-class performance in the SD and microSD form factor. Fully compliant with SD Specification Versions 7.0, 7.10, and 8.0 and NVMe protocol revisions 1.3 through 1.4, it supports complete verification of SD Express Host and Card components across PCIe Gen 3 and Gen 4 single and dual lane configurations delivering up to 3,938 MB/s, all UHS-I bus speed modes, all four SD memory card capacity classes from SDSC through SDUC, NVMe multi-queue operation, Host Memory Buffer, pseudo initialization mode, PCIe link-up mode, command queuing, and legacy SD UHS-I backward compatibility.

SmartDV’s SD Express VIP supports UVM, SystemVerilog, and Verilog, and integrates seamlessly into diverse verification environments. It is simulator-independent and compatible with all leading EDA simulators, providing flexibility across simulation platforms.

With 128b/130b encoding for PCIe Gen 3 and Gen 4, comprehensive error detection and injection across all SD, NVMe, and PCIe error types, card ownership protection, discard and logical erase operations, cache operation, lock-unlock and erase features, video class specification support, function extension commands, address extension commands, built-in functional coverage, and a complete test suite, SmartDV’s SD Express VIP enables verification teams to thoroughly validate SD Express interface designs for consumer cameras, gaming handhelds, drones, automotive infotainment, edge AI platforms, and any high-performance removable storage application.

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SD Express VIP

Key Features

Full SD Express Host and Card Support – Provides complete SD Express Host and Card component verification across pseudo initialization mode, PCIe link-up mode, SD and PCIe combined mode, legacy SD UHS-I backward compatible mode, low voltage 1.8V and 1.2V card support, and all defined SD Express initialization and enumeration sequences.
PCIe Gen 3 and Gen 4 Speed Coverage – Supports all defined SD Express bus speed modes including PCIe Gen 3 x1 at up to 985 MB/s, PCIe Gen 3 x2 at up to 1,969 MB/s, PCIe Gen 4 x1 at up to 1,969 MB/s, and PCIe Gen 4 x2 at up to 3,938 MB/s, with 128b/130b encoding and decoding for all Gen 3 and Gen 4 transfer modes, and dual simplex point-to-point PCIe serial connection.
NVMe Protocol Coverage – Supports NVMe protocol revisions 1.3 through 1.4 over PCIe interface, NVMe multi-queue operation with no locking mechanism, Host Memory Buffer support, command queuing, Admin and I/O queue management, and all defined NVMe command types for complete SD Express NVMe stack verification.
UHS-I and Legacy SD Support – Supports all UHS-I bus speed modes including SDR50, SDR104, and DDR50 for complete legacy SD interface verification, with backward compatibility covering all standard SD operating modes for seamless multi-generation device verification.
Memory Capacity Class Coverage – Supports all four defined SD memory card capacity classes including Standard Capacity SD (SDSC) up to 2 GB, High Capacity SD (SDHC) from 2 GB to 32 GB, Extended Capacity SD (SDXC) from 32 GB to 2 TB, and Ultra Capacity SD (SDUC) from 2 TB to 128 TB.
Advanced Feature Coverage – Supports card ownership protection, discard and full user area logical erase, cache operation, command queuing, address extension commands, video class specification, function extension commands, lock-unlock and erase operations, staggered spin-up equivalent initialization, and FPDMA Zone Management commands.
Comprehensive Error Detection and Injection – Detects and reports all defined SD, NVMe, and PCIe error types including out of range errors, address misalign errors, CRC errors, illegal command errors, block length errors, lock-unlock failed errors, erase sequence errors, stuff bit errors, invalid voltage errors, reserved bit errors, WP violation errors, CSD/CID overwrite errors, disparity errors, Admin/IO queue size errors, metadata mismatch errors, invalid Admin/IO command errors, invalid queue errors, TLP length errors, ECRC and LCRC errors, invalid TLP/DLLP command errors, and payload oversize and undersize errors.
Complete Verification Infrastructure – Provides a full test suite covering all SD 7.0, 7.10, and 8.0 specification features and NVMe 1.3 through 1.4 protocol features, built-in functional coverage analysis, bus-accurate timing, status counters for bus events, and complete notification of all protocol and timing violations.

Compliance and Compatibility

Fully compliant with SD Specification Version 8.0; backward compatible with SD 7.10 and 7.0
Supports NVMe protocol revisions 1.3, 1.3a, 1.3b, 1.3c, 1.3d, and 1.4 over PCIe interface
Supports PCIe Gen 3 and Gen 4 in x1 and x2 lane configurations up to 3,938 MB/s
Supports all four SD capacity classes from SDSC (up to 2 GB) through SDUC (up to 128 TB)
Supports legacy SD UHS-I (SDR50, SDR104, DDR50) for backward compatibility
Compatible with UVM, OVM, VMM, SystemVerilog, and Verilog verification environments
Compatible with all major EDA simulators including Synopsys VCS, Cadence Xcelium, Siemens Questa, Aldec Riviera-PRO, and Verilator

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