Contact Us
Overview

SmartDV’s PCM Controller IP is a silicon-proven, fully featured Pulse Code Modulation bus controller solution purpose-built for SoC designs requiring standardized digital audio connectivity to telecom basebands, Bluetooth audio codecs, and legacy voice-codec interconnects across consumer, mobile, and communications applications. Implementing the industry-standard PCM highway interface with both Short Frame Sync and Long Frame Sync modes, and supporting ITU-T G.711 A-law and μ-law companding, it delivers a compact, production-tested controller for the narrowband and wideband voice-audio interconnects used across Bluetooth SCO/eSCO links, GSM/telecom basebands, and legacy voice-codec designs.

Designed for the practical integration requirements of voice-audio SoC designs, the IP supports configurable master and slave clock generation, programmable time-slot allocation for multi-channel TDM-style operation over a shared PCM link, and both linear and companded (A-law/μ-law) sample formats for interoperability with narrowband telecom codecs and Bluetooth audio hardware. Its configurable frame sync polarity, slot width, and clock/frame timing give communications and consumer SoC teams a flexible, standards-aligned PCM interconnect for voice-path audio integration.

Built for design flexibility and silicon efficiency, the IP core is highly configurable for both ASIC and FPGA implementations, with a strong focus on area optimization, power management, and peak performance. Its parameterized slot and clocking architecture and clean host interface enable fast integration across a wide range of process nodes and target applications.

I2S Controller
Key Features
  • Short and Long Frame Sync Support – Configurable Short Frame Sync and Long Frame Sync PCM modes for interoperability with Bluetooth SCO/eSCO audio hardware and legacy telecom codecs
  • ITU-T G.711 Companding – Support for both A-law and μ-law 8-bit companding per ITU-T G.711, alongside linear PCM sample formats
  • Configurable Time-Slot Allocation – Programmable time-slot assignment for multi-channel TDM-style operation over a shared PCM highway link
  • Master and Slave Clock Generation – Configurable master-mode clock and frame sync generation, or slave-mode operation synchronized to an external PCM clock source
  • Flexible Frame Timing – Configurable frame sync polarity, clock edge, and slot width for interoperability across diverse codec and baseband PCM implementations
  • Narrowband and Wideband Voice Support – Configurable sample rate support for both narrowband (8 kHz) and wideband (16 kHz) voice-audio applications
  • Low-Latency Voice Path – Lightweight, low-latency architecture optimized for real-time voice-audio interconnect in communications SoC designs
Compliance and Compatibility
  • Compliant with ITU-T G.711 A-law and μ-law companding standards
  • Compatible with industry-standard PCM highway Short Frame Sync and Long Frame Sync interfaces (no single formal governing specification exists for the PCM bus itself; frame timing follows widely adopted Bluetooth SCO/eSCO and telecom baseband PCM interface conventions)
  • Compatible with Bluetooth SCO/eSCO PCM audio interconnects
  • Configurable SoC interface supporting AMBA AXI, AHB, APB, and custom wrappers for seamless integration
  • Compatible with ASIC and FPGA design flows across leading foundry process nodes
  • Compatible with all major EDA synthesis, simulation, and linting flows