SmartDV’s Microsecond Channel Verification IP is a comprehensive solution for verifying the Microsecond Bus serial communication interface, an open-market automotive peripheral serial communication standard designed for low-latency, deterministic control of smart power devices and sensor interfaces in engine management and body control applications. Fully compliant with SAE Technical Paper 2005-01-0057, it supports complete verification of MSC master and device components across the bidirectional high-speed synchronous downstream and low-speed asynchronous upstream interface, covering triggered and data repetition transmission modes, all downstream command and data frame types, all upstream 12-bit and 16-bit frame types, parity checking, configurable baud divider rates, and comprehensive error injection and detection.
SmartDV’s MSC VIP supports UVM, SystemVerilog, and Verilog, and integrates seamlessly into diverse verification environments. It is simulator-independent and compatible with all leading EDA simulators, providing flexibility across simulation platforms.
With support for TLE8888QK, TLE8718SA, and L9779WD automotive power management device models, SEL bit configuration, all defined baud divider rates, built-in functional coverage, and a complete test suite, SmartDV’s MSC VIP enables verification teams to thoroughly validate Microsecond Channel interface designs for automotive engine control units, body control modules, smart power stage interfaces, and motor management applications.
