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Overview

SmartDV’s CXP Device IP is a fully featured CoaXPress camera device solution purpose-built for SoC designs requiring high-speed, reliable machine vision camera transmitter connectivity in industrial inspection, scientific imaging, and broadcast camera applications. Fully compliant with CoaXPress Specification v2.1 and backward compatible with v2.0, v1.1.1, and v1.1, it delivers complete CXP device transmitter functionality supporting up to 4 connections, high-speed downstream bit rates from 1.25 Gbps to 12.5 Gbps, and low-speed upstream bit rates at 20.83 Mbps and 41.66 Mbps across Stream, I/O, and Control channels.

Designed as the natural camera-side complement to a CXP Host, the IP supports 8B/10B encoding and decoding, packing of all CXP video formats, 8, 10, 12, 14, and 16-bit pixel depth, the complete range of color formats, Bootstrap register set, packet multiplexing for multiple streams, Link Sharing, Unified Time Stamping, and connection test facilities for link quality testing. Its backward compatibility with v1.1.1 and HsUpConnection bootstrap register for HS up connection support indication give industrial imaging camera SoC teams a production-ready CXP device implementation.

Built for design flexibility and silicon efficiency, the IP core is highly configurable for both ASIC and FPGA implementations. Its parameterized connection architecture and clean host interface enable fast integration across a wide range of machine vision process nodes.

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CXP Host
Benefits
  • Full CXP Device Transmitter Functionality – Complete camera-side CoaXPress implementation per CXP v2.1 supporting up to 4 connections with Stream, I/O, and Control channel support
  • High-Speed Downstream Transmission – 1.25, 2.50, 3.125, 5.00, 6.25, 10, and 12.5 Gbps downstream bit rate support with 8B/10B encoding
  • Comprehensive Video Format Support – 8, 10, 12, 14, and 16-bit depth with Raw, Mono, Planar 1-15, all Bayer patterns, RGB, RGBA, YUV 411/422/444, and YCbCr 601/709 411/422/444 color formats
  • Bootstrap Register Set – Complete Bootstrap register set including HsUpConnection register for HS up connection support indication
  • Packet Multiplexing and Link Sharing – Stream packet multiplexing for multiple concurrent video streams and Link Sharing support
  • Unified Time Stamping – Unified Time Stamping support for precise image acquisition timing
Compliance and Compatibility
  • Fully compliant with CoaXPress Specification v2.1; backward compatible with CXP v2.0, v1.1.1, and v1.1
  • Configurable SoC interface supporting AMBA AXI, AHB, APB, and custom wrappers for seamless integration
  • Compatible with ASIC and FPGA design flows across leading foundry process nodes
  • Compatible with all major EDA synthesis, simulation, and linting flows

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