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AFDX 1G MAC
Design IP
Overview

SmartDV’s AFDX (Avionics Full Duplex Switched Ethernet) 1G MAC IP is a silicon-proven, high-performance solution built for safety-critical aerospace and defense systems. Fully compliant with ARINC 664 specifications, it ensures deterministic, high-speed, and fault-tolerant data communication across avionics networks.
Designed for flexibility, the IP core is highly configurable to meet specific design requirements, supporting both ASIC and FPGA implementations while optimizing for area, power, and performance. It can be seamlessly integrated with AFDX switch controllers and supports features like virtual links, traffic shaping, and redundancy management, making it ideal for modern avionics architectures.

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AFDX 1G MAC
Benefits
  • Deterministic Avionics Ethernet – Designed for real-time communication with ultra-low latency and configurable Virtual Link (VL) traffic shaping using Bandwidth Allocation Gap (BAG)
  • Advanced Traffic Management – Supports 32 Virtual Links, adjustable BAG values (1ms to 128ms), and programmable Inter-Packet Gap (IPG) and preamble length
  • High Reliability and Redundancy – Includes frame replication and elimination (IEEE 802.1CB), redundancy control, and integrity checking for fault-tolerant data delivery
  • Compact and Configurable – Compact implementation with configurable transmit/receive FIFOs and independent TX/RX MTU support
  • Flexible Interface Options – Supports GMII, RGMII, MII interfaces, and MDIO (Clause 22 and Clause 45) for PHY management
  • Comprehensive Statistics and Monitoring – Provides detailed output statistics including per-VL message counts and FCS generation for integrity assurance
  • Optimized Performance – Full-duplex 1G Ethernet support with cut-through forwarding capability for minimal transmission delay
Compliance and Compatibility
  • Fully compliant with ARINC 664 Part 7 (AFDX Specification)
  • Compliant with IEEE 802.3-2018 for 10/100/1000 Mbps Ethernet
  • Supports IEEE 802.1CB for frame replication and elimination
  • Compatible with all major EDA synthesis, simulation, and linting flows

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