SmartDV’s ARINC 664 Verification IP is a comprehensive solution for verifying the Aircraft Data Network standard for safety-critical avionics applications, implementing the Avionics Full Duplex Switched Ethernet network as defined in ARINC Specification 664 Part 7. Built on IEEE 802.3 10/100 Mbit/s full duplex Ethernet, it supports complete verification of ARINC 664 transmitters, receivers, and monitors across all word structures and protocol requirements, covering Virtual Link-based deterministic traffic shaping, transmit redundancy management, and upper layer protocol handling for IPv4 and UDP.
SmartDV’s ARINC 664 VIP supports UVM, SystemVerilog, and Verilog, and integrates seamlessly into diverse verification environments. It is simulator-independent and compatible with all leading EDA simulators, providing flexibility across simulation platforms.
With Bandwidth Allocation Gap traffic shaping, transmit redundancy control, comprehensive error injection and detection, glitch injection, protocol violation monitoring, built-in functional coverage, and a complete test suite, SmartDV’s ARINC 664 VIP enables verification teams to thoroughly validate deterministic avionics network designs for commercial aviation, defense, and aerospace applications.
