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Overview

SmartDV’s UART Controller IP is a silicon-proven, fully featured Universal Asynchronous Receiver/Transmitter solution purpose-built for SoC designs requiring reliable, flexible serial communication across embedded, automotive, IoT, and industrial applications. Compatible with the industry-standard UART 16550 specification, it delivers complete full-duplex UART functionality with programmable baud rates from 110 bps to 1 Mbps, configurable character widths from 1 to 32 bits, and support for Character Mode, FIFO Mode, and Extended FIFO Mode — providing a production-ready serial communication peripheral for the most demanding embedded SoC designs.

Designed for the practical integration requirements of modern embedded SoC designs, the IP supports programmable word length, stop bits from 1 to 4.5, and parity configuration alongside comprehensive error detection covering parity, framing, and overflow errors. Its full modem control interface with CTS, RTS, DSR, DTR, RI, and DCD signals, programmable hardware flow control, line break detection and generation, automatic data formatting, and configurable receive FIFO depth give SoC teams a production-tested, feature-complete UART controller that integrates cleanly with the widest range of serial communication devices and host processor interfaces.

Built for design flexibility and silicon efficiency, the IP core is highly configurable for both ASIC and FPGA implementations, with a strong focus on area optimization, power management, and peak performance. Its parameterized FIFO architecture and clean host interface enable fast integration and confident design bring-up across a wide range of process nodes and target applications.

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UART Controller
Key Features
  • Full UART Functionality – Complete full-duplex UART implementation with Character Mode, FIFO Mode, and Extended FIFO Mode support
  • Flexible Baud Rate Support – Programmable baud rates from 110 bps to 1 Mbps for compatibility with a wide range of serial communication devices
  • Configurable Serial Interface – Character widths from 1 to 32 bits, 1 to 4.5 stop bits, and programmable parity for complete serial protocol flexibility
  • Comprehensive Error Detection – Parity, framing, and overflow error detection with line break detection and generation for robust serial communication fault management
  • Full Modem Control Interface – CTS, RTS, DSR, DTR, RI, and DCD modem control signals with programmable hardware flow control for complete modem and serial device compatibility
  • Configurable FIFO Architecture – Configurable receive FIFO depth with automatic data formatting and status generation for efficient serial data management
  • Interrupt Controller – Comprehensive interrupt management for efficient, event-driven UART operation across all supported modes
Compliance and Compatibility
  • Compatible with industry-standard UART NS16550A de-facto specification
  • Configurable SoC interface supporting AMBA AXI, AHB, APB, and custom wrappers for seamless integration
  • Compatible with ASIC and FPGA design flows across leading foundry process nodes
  • Compatible with all major EDA synthesis, simulation, and linting flows

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