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Overview

SmartDV’s Smart Card Verification IP is a comprehensive solution for verifying the ISO/IEC 7816-3 electrical interface and transmission protocol, the foundational international standard governing communication between integrated circuit cards and interface devices used across banking, telecommunications, identification, and secure access applications. Fully compliant with ISO/IEC 7816-3:2006, it supports complete verification of Smart Card Master and Slave components across complete smart card session functions including card activation and deactivation, cold and warm reset, Answer to Reset response reception, and data transfer, both T=0 asynchronous half-duplex character transmission and T=1 asynchronous half-duplex block transmission protocols, all three resynchronization levels for both interface device and card, and configurable clock and baud rate.

SmartDV’s Smart Card VIP supports UVM, SystemVerilog, and Verilog, and integrates seamlessly into diverse verification environments. It is simulator-independent and compatible with all leading EDA simulators, providing flexibility across simulation platforms.

With Sleep mode and Clock Stop mode, automatic convention detection, automatic voltage class selection, configurable timing functions, comprehensive error injection and detection, both synchronous and asynchronous communication modes, built-in functional coverage, and a complete test suite, SmartDV’s Smart Card VIP enables verification teams to thoroughly validate ISO/IEC 7816-3 interface designs for EMV payment cards, SIM and UICC cards, secure access tokens, government identification cards, and any application requiring standardized contact-based integrated circuit card communication.

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SmartCard (IEC7816) VIP
Key Features
  • Full Smart Card Master and Slave Support – Provides complete IEC 7816-3 Master and Slave component verification supporting complete Smart Card and SIM Card commands, full smart card session functions including card activation and deactivation, cold and warm reset, Answer to Reset response reception, and data transfer to and from the card.
  • T=0 and T=1 Protocol Coverage – Supports T=0 asynchronous half-duplex character transmission protocol and T=1 asynchronous half-duplex block transmission protocol, covering both commonly used ISO/IEC 7816-3 communication protocols with adjustable clock rate and bit/baud rate, and configurable automatic byte repetition.
  • Resynchronization and Power Management – Supports all three resynchronization levels for the interface device including retransmission of blocks, use of S(RESYNCH request), and warm reset or deactivation, and all three resynchronization levels for the card including retransmission of blocks, use of S(RESYNCH response), and card unresponsiveness without interface device action, alongside Sleep mode and Clock Stop mode.
  • Automatic Detection and Configurable Timing – Supports automatic convention detection, automatic voltage class selection, and configurable timing functions including smart card activation time, guard time, and timeout timers for comprehensive power-up and session timing verification.
  • CRC and Communication Mode Coverage – Supports both synchronous and asynchronous modes of communication, and both CRC polynomial types including ISO/IEC 13239, ISO/IEC 14443-3 Type B, ITU-T Rec. V.42, and CRC-T1 as used by many ISO/IEC 7816-3 readers.
  • Comprehensive Error Injection and Detection – Supports all defined error types including character parity errors, redundancy code errors, invalid PCB, invalid LEN, loss of synchronization, and failure to receive the relevant S(response) after transmitting S(request) for thorough protocol violation and fault tolerance verification.
  • Complete Verification Infrastructure – Provides a full test suite covering all ISO/IEC 7816-3:2006 specification features, built-in functional coverage analysis, constraints randomization, status counters for bus events, and callbacks in transmitter, receiver, and monitor for user-defined data processing and protocol and timing violation notification, with Slave/Card BFM supporting standard Smart Card and SIM Card chip models.
Compliance and Compatibility
  • Fully compliant with ISO/IEC 7816-3:2006 (Electronic Signals and Transmission Protocols)
  • Supports T=0 (asynchronous character) and T=1 (asynchronous block) transmission protocols
  • Supports ISO/IEC 13239, ISO/IEC 14443-3 Type B, ITU-T Rec. V.42, and CRC-T1 CRC polynomials
  • Forms the protocol basis for ETSI TS 102 221 (UICC) and EMV smart card communication
  • Compatible with UVM, OVM, VMM, SystemVerilog, and Verilog verification environments
  • Compatible with all major EDA simulators including Synopsys VCS, Cadence Xcelium, Siemens Questa, Aldec Riviera-PRO, and Verilator

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