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Overview

SmartDV’s IEC7816 Slave IP is a silicon-proven, fully featured smart card device controller solution purpose-built for SoC designs requiring reliable, standards-compliant smart card device-side communication across banking, government ID, healthcare, and access control applications. Fully compliant with ISO/IEC 7816-3:2006 (including Amendment 1:2025 for additional voltage classes), it delivers complete general-purpose smart card slave functionality supporting both T=0 and T=1 communication protocols with full smart card session management, independent of the mobile-specific UICC extensions found in telecom SIM/USIM applications.

Designed as the natural card-side complement to an IEC7816 master controller, the IP handles the complete slave-side smart card session including card activation and deactivation, cold and warm reset response, and Answer to Reset (ATR) response generation. Its T=0 asynchronous half-duplex character transmission and T=1 asynchronous half-duplex block transmission support, adjustable clock and baud rates, and configurable automatic byte repetition give smart card and secure element SoC teams a production-tested, spec-complete slave implementation applicable to banking EMV cards, government ID cards, healthcare cards, and general-purpose contact smart card applications.

Built for design flexibility and silicon efficiency, the IP core is highly configurable for both ASIC and FPGA implementations, with a strong focus on area optimization, power management, and peak performance. Its parameterized architecture and clean host interface enable fast integration and confident design bring-up across a wide range of process nodes and target applications.

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IEC7816 Slave
Benefits
  • Full IEC 7816-3 Slave Functionality – Complete general-purpose smart card device-side implementation per ISO/IEC 7816-3:2006 supporting all UICC-independent smart card session functions
  • Complete Smart Card Session Management – Card activation and deactivation, cold and warm reset, and Answer to Reset (ATR) response generation for complete card lifecycle management
  • T=0 and T=1 Protocol Support – T=0 asynchronous half-duplex character transmission and T=1 asynchronous half-duplex block transmission for comprehensive smart card protocol coverage
  • Flexible Clock and Baud Rate – Adjustable clock rate and bit rate configuration for adaptation to diverse smart card reader timing requirements
  • Configurable Byte Repetition – Automatic byte repetition support with configurable repetition count for reliable error recovery in noisy smart card communication environments
  • General-Purpose Applicability – Suited for banking EMV, government ID, healthcare, and access control smart card applications beyond telecom UICC/SIM use cases
Compliance and Compatibility
  • Fully compliant with ISO/IEC 7816-3:2006 specification for smart card electrical interface and transmission protocols
  • Compliant with ISO/IEC 7816-3:2006/Amd 1:2025 (additional voltage classes)
  • Configurable SoC interface supporting AMBA AXI, AHB, APB, and custom wrappers for seamless integration
  • Compatible with ASIC and FPGA design flows across leading foundry process nodes
  • Compatible with all major EDA synthesis, simulation, and linting flows

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