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Overview

SmartDV’s Camera Link HS Camera IP is a fully featured Camera Link HS transmitter solution purpose-built for SoC designs requiring high-speed, multi-cable camera connectivity in machine vision, industrial inspection, and scientific imaging applications. Fully compliant with Camera Link HS Specification v1.1, it delivers complete camera-side transmitter functionality supporting M-Protocol at 3 Gbps with 8B/10B encoding and X-Protocol at 10 Gbps with 64B/66B encoding, up to 8 cable packetization with up to 15 data lanes per cable, and all video formats specified in Camera Link HS v1.1.

Designed for the demanding requirements of modern high-speed machine vision camera SoC designs, the IP supports 8, 10, 12, 14, and 16-bit pixel depth, RGB and color formats in both Mixed and Planar data presentations, 7 pulse trigger modes, 32 GPIO, and ACK/NACK/Resend handshaking with packet interruption based on message priority. Its device control register set per Camera Link HS v1.1, GenCP v1.1 command message packet format, and support for Raw, Mono, B, G, R, BGR, BGRa, and all Bayer pattern color formats give machine vision camera SoC teams a production-ready, spec-complete camera transmitter implementation.

Built for design flexibility and silicon efficiency, the IP core is highly configurable for both ASIC and FPGA implementations. Its parameterized cable and lane architecture and clean host interface enable fast integration across a wide range of machine vision process nodes and target applications.

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Key Features
  • Full Camera Link HS Camera Transmitter Functionality – Complete transmitter implementation per Camera Link HS v1.1 supporting M-Protocol (3 Gbps, 8B/10B) and X-Protocol (10 Gbps, 64B/66B) with up to 8 cables and up to 15 data lanes per cable
  • Comprehensive Video Format Support – 8, 10, 12, 14, and 16-bit depth with RGB and all color formats in Mixed and Planar presentations including Raw, Mono, BGR, BGRa, and all Bayer patterns
  • Complete Message Packet Support – Video, Command, Acknowledge, Revision, and 7 pulse trigger mode messages with 32 GPIO and packet interruption based on priority
  • GenCP Command Interface – Command message packet format based on GenCP v1.1 specification for standards-compliant camera control
  • Forward Error Correction – FEC support in X-Protocol for reliable 10 Gbps data transmission
  • ACK/NACK/Resend Handshaking – Complete handshaking mechanism for reliable message delivery
  • Device Control Register Set – Complete device control register set per Camera Link HS v1.1 specification
Compliance and Compatibility
  • Fully compliant with Camera Link HS Specification v1.1
  • Compatible with GenCP v1.1 specification for camera control
  • Configurable SoC interface supporting AMBA AXI, AHB, APB, and custom wrappers for seamless integration
  • Compatible with ASIC and FPGA design flows across leading foundry process nodes
  • Compatible with all major EDA synthesis, simulation, and linting flows

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