UAS VIP

Simulation

Key Features Compliance and Compatibility Request a Datasheet

Overview

SmartDV’s UAS Verification IP is a comprehensive solution for verifying USB Attached SCSI, the SCSI transport protocol enabling high-performance command queuing and out-of-order completion for USB-attached storage devices including SSDs, HDDs, and flash drives. Fully compliant with USB Attached SCSI UAS-3 (INCITS 572-2021), SCSI Architecture Model SAM-6, and SCSI Primary Commands SPC-6, alongside USB 2.0 and USB 3.0/3.1/3.2 specifications, it supports complete verification of UAS Initiator and Target components across Standard USB 2.0 interfaces including UTMI, UTMI+, ULPI, and Serial interfaces, and SuperSpeed USB 3.0, SuperSpeedPlus 3.1 and 3.2, and USB 3.0 OTG.

SmartDV’s UAS VIP supports UVM, SystemVerilog, and Verilog, and integrates seamlessly into diverse verification environments. It is simulator-independent and compatible with all leading EDA simulators, providing flexibility across simulation platforms.

With application client SCSI primary command set generation, support for up to 127 USB device domains, single and complex UAS Domains, comprehensive error injection across USB and UAS layers, built-in functional coverage, and a complete test suite, SmartDV’s UAS VIP enables verification teams to thoroughly validate UAS interface designs for external SSD enclosures, USB storage controllers, USB-to-SATA/NVMe bridges, and any high-performance USB-attached storage application requiring command queuing beyond Bulk-Only Transport capabilities.

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Key Features

Full UAS Initiator and Target Support – Provides complete UAS Initiator and Target component verification across Standard USB 2.0 interfaces including UTMI, UTMI+, ULPI, and Serial interfaces, and SuperSpeed USB 3.0, SuperSpeedPlus 3.1 and 3.2, and USB 3.0 OTG, with application client generation of SCSI primary command sets.
Domain and Topology Coverage – Supports up to 127 USB device domains, single and complex UAS Domains, and Configuration Summary Descriptors for complete verification of UAS topology configuration and enumeration behavior.
Information Unit Coverage – Supports all defined UAS Information Units including COMMAND IU, RESPONSE IU, SENSE IU, READ READY IU, WRITE READY IU, and TASK MANAGEMENT IU, covering the full UAS command, status, data readiness, and task management message exchange model.
USB Resilience and Recovery Coverage – Supports USB retimers, reset handling, and I_T nexus loss recovery, enabling verification of UAS behavior under USB link-level disruption and recovery scenarios consistent with SAM-6 architecture model requirements.
Comprehensive Error Injection and Detection – Supports all types of USB error injection and detection, with proficiency to generate random frames and respond to frames in directed or randomized fashion for thorough protocol robustness and fault tolerance verification.
Complete Verification Infrastructure – Provides a full test suite covering all UAS-3 specification features including USB 2.0 and USB 3.x standards, built-in functional coverage analysis, a rich set of configuration parameters to control UAS functionality, constrained randomization of protocol attributes, status counters for various events, and callbacks in Initiator, Target, and Monitor for user-defined event handling and protocol and timing violation notification.

Compliance and Compatibility

Fully compliant with USB Attached SCSI UAS-3 (INCITS 572-2021, ISO/IEC 14776-253:2023)
Compliant with SCSI Architecture Model SAM-6 and SCSI Primary Commands SPC-6
Compliant with USB 2.0 and USB 3.0/3.1/3.2 specifications
Supports up to 127 USB device domains with single and complex UAS Domains
Compatible with UVM, OVM, VMM, SystemVerilog, and Verilog verification environments
Compatible with all major EDA simulators including Synopsys VCS, Cadence Xcelium, Siemens Questa, Aldec Riviera-PRO, and Verilator

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