SmartDV’s TS5 Verification IP is designed to verify the Thermal Sensor Interface used for monitoring and managing temperature in advanced SoCs, data centers, mobile devices, and automotive systems. Fully compliant with the TS5 specification defined by Intel and its ecosystem partners, this VIP enables accurate validation of digital thermal sensor communication, temperature reporting, alert signaling, and control handshakes.

The VIP supports major verification languages, including SystemVerilog and Verilog, and integrates seamlessly with UVM, OVM, and VMM methodologies. It is simulator-independent and compatible with all leading EDA vendors’ simulators, ensuring smooth integration into any simulation environment.

With configurable master and slave agents, support for multiple sensor instances, programmable temperature thresholds, protocol checkers, and error injection capabilities, SmartDV’s TS5 VIP empowers verification teams to confidently validate power and thermal management features in high-performance and thermally constrained designs.