SmartDV’s MIPI HTI Verification IP is a comprehensive solution for verifying the MIPI High-Speed Trace Interface, a serial trace export interface that leverages the low-level physical layer of high-speed serial interfaces such as PCI Express, DisplayPort, HDMI, and USB to provide higher trace bandwidth with fewer I/O pins compared with parallel implementations. Fully compliant with MIPI HTI v1.1 (September 2021) and backward compatible with HTI v1.0, it supports complete verification of HTI transmitter and receiver components across point-to-point topologies with up to 8 lanes, all defined bit rates from 1.62 Gbps to 16 Gbps, Aurora 8B/10B encoding and decoding, NRZ line encoding, MIPI STP and MIPI TWP trace protocol transport, user flow control, LFSR test pattern generation, and clock recovery.
SmartDV’s MIPI HTI VIP supports UVM, SystemVerilog, and Verilog, and integrates seamlessly into diverse verification environments. It is simulator-independent and compatible with all leading EDA simulators, providing flexibility across simulation platforms.
With comprehensive 8B/10B error injection and detection, constraints randomization, built-in functional coverage, and a complete test suite, SmartDV’s MIPI HTI VIP enables verification teams to thoroughly validate high-speed trace interface designs for mobile SoCs, application processors, automotive ECUs, and any embedded system requiring high-bandwidth trace data export for debug and system analysis.
