SmartDV’s Microwire Verification IP is a comprehensive solution for verifying the Microwire serial interface, the widely-adopted 3-wire half-duplex serial communication protocol originally developed by National Semiconductor for connecting microcontrollers to EEPROM memory devices and peripheral ICs. Compliant with the Microwire and Microwire/Plus specification as defined in National Semiconductor Application Note AN-452 and vendor device datasheets, it supports complete verification of Microwire master and slave components across configurable address widths from 2 to 32 bits and data widths from 2 to 64 bits, covering single and burst transfer modes, all Fairchild, Microchip, onsemi, and STMicroelectronics EEPROM device implementations, and configurable baud rate and clock division.
SmartDV’s Microwire VIP supports UVM, SystemVerilog, and Verilog, and integrates seamlessly into diverse verification environments. It is simulator-independent and compatible with all leading EDA simulators, providing flexibility across simulation platforms.
With on-the-fly data generation, internal clock division checking, comprehensive EEPROM device model support, built-in functional coverage, and a complete test suite, SmartDV’s Microwire VIP enables verification teams to thoroughly validate Microwire serial interface designs for embedded microcontrollers, automotive ECUs, industrial control systems, and consumer electronics requiring serial EEPROM access.
