SmartDV’s Interrupt Controller IP is a silicon-proven, fully featured interrupt management solution purpose-built for SoC designs requiring flexible, prioritized interrupt handling across embedded, IoT, automotive, and industrial applications. Compliant with standard interrupt controller conventions, it delivers complete interrupt management functionality supporting up to 31 IRQ sources plus one dedicated fast IRQ source, with programmable edge and level trigger detection for each interrupt input.
Designed for the practical integration requirements of modern embedded SoC designs, the IP supports programmable edge-triggered (rising or falling) or level-sensitive (high or low) trigger sources, a selectable source for the fast IRQ, and up to 31 pending interrupts while servicing a single active interrupt. Its eight levels of hardware priority, selectable hardware or software interrupt source per input, and fully maskable interrupt sources give embedded SoC teams a production-tested, flexible interrupt controller suited for real-time and general-purpose embedded processor designs.
Built for design flexibility and silicon efficiency, the IP core is highly configurable for both ASIC and FPGA implementations, with a strong focus on area optimization, power management, and peak performance. Its parameterized interrupt source count and clean host interface enable fast integration and confident design bring-up across a wide range of process nodes and target applications.
