SmartDV’s eUSB2 Verification IP is a comprehensive solution for verifying the Embedded USB2 physical layer interface, enabling low-voltage USB connectivity at advanced process nodes where standard USB 2.0 3.3V I/O signaling is no longer practical. Fully compliant with the eUSB2 Physical Layer Supplement to the USB Revision 2.0 Specification Rev 1.2 and the eUSB2V2 Supplement to the USB 2.0 Specification, it supports complete verification of eUSB2 Host and Peripheral components in both native and repeater modes, covering high-speed, full-speed, and low-speed operation in eUSB2 Rev 1.2, and symmetric and asymmetric link configurations at data rates up to 4.8 Gbps in eUSB2V2, with full USB 2.0 protocol layer compliance across all transfer types, link power management, and register access protocol support.
SmartDV’s eUSB2 VIP supports UVM, SystemVerilog, and Verilog, and integrates seamlessly into diverse verification environments. It is simulator-independent and compatible with all leading EDA simulators, providing flexibility across simulation platforms.
With comprehensive native and repeater mode coverage, LPM-L1 and Suspend support, register access protocol verification, eUSB2V2 UTMI 2.0 support, on-the-fly protocol and data checking, built-in functional coverage, and a complete test suite, SmartDV’s eUSB2 VIP enables verification teams to thoroughly validate embedded USB2 interface designs for mobile SoCs, smartphones, tablets, notebooks, IoT devices, and advanced process node applications.