Experts at the Table: The current state of open-source tools and what the RISC-V landscape will look like by 2025.
Ed Sperling, Semiconductor Engineering
October 6, 2020
Part 3: Semiconductor Engineering sat down to discuss the business and technology landscape for RISC-V with Zdenek Prikryl, CTO of Codasip; Helena Handschuh, a Rambus Security Technologies fellow; Louie De Luna, director of marketing at Aldec; Shubhodeep Roy Choudhury, CEO of Valtrix Systems; and Bipul Talukdar, North America director of applications engineering at SmartDV. What follows are excerpts from that conversation. To view Part 1, click here. Part 2 is here.
SE: Is there room for other open-source ISAs?
De Luna: No. In fact, momentum is moving toward a single ISA in any given SoC rather than multiple ISAs. Today, the average SoC contains five ISAs. The industry would prefer one because it simplifies hardware-software interfaces and reduces complexity. Multiple ISAs also require multiple IC groups. The RISC-V Foundation is doing an excellent job managing and promoting RISC-V, and their objectives are clear.
Prikryl: I don’t believe there’s a need for another open-source ISA. RISC-V isn’t the first attempt at an open ISA, but it’s the first to succeed. The difference is the massive community — not just academia or hobbyists, but commercial companies as well. That didn’t happen before. Introducing more fragmentation now wouldn’t be wise. Instead, we should continue improving the current ISA with new extensions and features.
Roy Choudhury: Large chip companies once used multiple ISAs internally, but they’re moving rapidly to RISC-V. The market is already saturated. If someone wants a new ISA, it’s better to join RISC-V.
Talukdar: One challenge is interpreting the spec. You must tell customers the IP and verification IP are proven, benchmarked, and deployed in real products. That level of maturity isn’t easily replicated with a brand-new ISA.
SE: How about open-source design tools? Are they sufficient? Will that change?
Prikryl: Open-source tools are beneficial because they allow anyone — students, hobbyists, startups — to begin designing. But commercial tools still have a place. Chip design requires reliability, fast support, and fixes — all of which typically come with commercial licensing. There’s work ahead for the community to improve open-source tools for synthesis and related tasks.
Roy Choudhury: There’s space for open-source tools, but support is lacking today. People need commercial-level support. Some RISC-V companies already use open-source tools, but for widespread adoption, strong support systems must emerge.
Handschuh: RISC-V is helping set up a framework and ecosystem. There’s room for everyone — open-source contributors and commercial vendors. It’s not a world where everything becomes free. Companies still need revenue, and customized solutions will grow. In our case, implementing RISC-V in our Root of Trust product required only small adjustments for specific security needs.
De Luna: The focus today is on open-source IP. What happens with verification tools over time remains to be seen, but interest is growing.
Talukdar: Companies like Bluespec take open-source cores and productize them successfully. There’s a roadmap, and if companies follow it properly, the market will mature — much like Red Hat did with Linux.
SE: How will this market look in five years?
Prikryl: RISC-V adoption will continue rising, expanding into HPC, servers, and automotive. It won’t be limited to embedded applications. We will eventually see a RISC-V mobile phone. Other architectures won’t disappear, but RISC-V will take significant market share.
Handschuh: We’ll see RISC-V optimized for different verticals, plus more compliance programs and certifications. The ecosystem will mature with customized specs suited for specific industries.
Roy Choudhury: We’ll see far more companies using the same processes, and eventually a powerful Linux-capable RISC-V CPU. Many RISC-V developments are happening quietly — we will see major announcements soon.
De Luna: Before RISC-V takes market share from Arm and x86, many milestones must be achieved. But eventually we could see a single ISA for SoCs — ideally RISC-V.
Talukdar: Toolset requirements will become defined and standardized. In five years, RISC-V will likely match Arm’s ecosystem in tooling, FPGA flows, and emulator compatibility. When that happens, there’s no turning back.
This article was originally published on Semiconductor Engineering