Will Provide Sales Support for SmartDV’s Design, Verification IP; Partner to Integrate SimXL Synthesizable Transactors with Desktop Emulation, FPGA Prototyping Tools
SAN JOSE, CALIF –– May 9, 2019 –– SmartDVTM Technologies, the Proven and Trusted choice for Verification Intellectual Property (IP), today named HyperSilicon Co. Ltd. its exclusive sales representative in China.
HyperSilicon is a technical sales and support organization based in Beijing, China, with a 30-member team of IP, system-on-chip (SoC), application-specific integrated circuit (ASIC), and field-programmable gate array (FPGA) design experts. Working with SmartDV, HyperSilicon will provide sales and technical support for SmartDV’s extensive portfolio of Design and Verification IP throughout China.
Additionally, SmartDV and HyperSilicon will work together to integrate the SEMU desktop emulator and VeriTiger product line, a family of FPGA prototyping solutions, with SmartDV’s SimXLTM portfolio of Synthesizable Transactors.
SimXL, a configurable, reusable plug-and-play verification solution for interfaces based on industry-standard hardware verification languages (HVLs), is used with hardware emulation or rapid prototyping tools to accelerate system-level SoC testing. It is fully compliant with popular standards’ specifications, including automotive, serial bus, memory, MIPI, networking, SoC interconnect fabrics, storage, and video protocols. An interface based on UVM, OVM, SystemVerilog, or SystemC controls SimXL.
“HyperSilicon is well respected and has the added advantage of desktop emulation and FPGA-based rapid prototype boards that complement our SimXL synthesizable transactors,” remarks Barry Lazow, vice president of sales for SmartDV. “We welcome the opportunity to work cooperatively with HyperSilicon to improve chip design validation and verification.”
Adds Daniel Bai, vice president of HyperSilicon: “SmartDV is known for having the largest portfolio and highest-quality design and verification IP solutions, along with exceptional customer support. It is destined to become a valuable resource to our design and verification community.”