SmartDV’s GDDR6 Verification IP is a comprehensive solution for verifying Graphics Double Data Rate 6 memory interfaces for high-bandwidth GPU, AI accelerator, automotive ADAS, networking, and compute applications. Fully compliant with JEDEC JESD250D and backward compatible with JESD250C, JESD250B, JESD250A, and JESD250, it supports complete verification of GDDR6 device components across dual-channel x16 configurations with densities up to 32 GB, covering all defined commands, dual-channel pseudo-channel mode operation, DDR and QDR data transfer, bank grouping, training modes, CRC-based data integrity, and all timing and protocol violation detection.
SmartDV’s GDDR6 VIP supports UVM, SystemVerilog, and Verilog, and integrates seamlessly into diverse verification environments. It is simulator-independent and compatible with all leading EDA simulators, providing flexibility across simulation platforms.
With comprehensive dual-channel architecture support, Refresh Management, auto and self-refresh, COMMAND ADDRESS/WCK2CK/READ/WRITE training modes, IEEE 1149.1 boundary scan, bus-accurate timing for minimum, maximum, and typical values, built-in functional coverage, and a complete test suite, SmartDV’s GDDR6 VIP enables verification teams to thoroughly validate graphics memory interface designs for discrete GPUs, AI training and inference accelerators, automotive graphics, and high-performance networking SoC applications.
