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UFS 2.x Device
Design IP
Overview

SmartDV’s UFS (Universal Flash Storage) 2.x Device IP is a silicon-proven, high-performance solution tailored for high-speed, low-power storage in mobile, automotive, and embedded applications. It is fully compliant with JEDEC UFS 2.0/2.1/2.2 specifications, MIPI M-PHY v3.0/v4.1, and MIPI UniPro v1.6 standards, ensuring robust and efficient data transfer between the host and non-volatile memory.

Designed for flexibility, the IP core is highly configurable to meet specific design requirements, supporting both ASIC and FPGA implementations while optimizing for area, power, and performance. With support for features such as HS-G3 signaling, power-saving modes, and advanced command queuing, SmartDV’s UFS 2.x Device IP delivers seamless integration and reliable performance across a broad range of SoC platforms.

UFS Device
Benefits
  • Silicon-proven core
  • UFS command set layer (UCS), UFS transport protocol layer (UTP), UFS interconnect layer (UIC)
  • Priority LUN handling
  • Multiple user data partition with enhanced user data area options
  • Up to 256 outstanding commands
Compliance and Compatibility
  • UFS Specification JESD220E (UFS 3.1)
  • UFS Specification JESD220D (UFS 3.0)
  • UFS Specification JESD220E (UFS 2.1)
  • HCI Specification JESD223C
  • Unified Memory Extension Specification JESD220-1A (Version 1.1)
  • MIPI UniPro Specification 1.6, 1.8, and 2.0
  • MIPI M-PHY Specification 3.0 ,4.1, and 5.0
  • All major EDA synthesis, simulation, linting flows