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USB 3.x Host
Design IP
Overview

SmartDV’s USB 3.x Host IP is a silicon-proven solution engineered for high-speed data connectivity in applications such as storage systems, embedded computing, consumer electronics, and industrial automation. Fully compliant with USB 3.1 and USB 3.2 specifications, it supports both SuperSpeed (5 Gbps) and SuperSpeed+ (10 Gbps) modes, while maintaining full backward compatibility with USB 2.0 devices.

Designed for flexibility, the IP core is highly configurable to meet specific design requirements, supporting both ASIC and FPGA implementations while optimizing for area, power, and performance. It includes advanced features such as support for isochronous and bulk transfers, robust host scheduling, LTSSM, and a standard PIPE interface, ensuring reliable, high-throughput host performance across platforms.

USB 3.x Host
Benefits
Silicon-proven IP core
Choice of host interface: AHB, AXI, VCI, OCP, Avalon, PLB, TileLink, Wishbone, custom protocol
Compliance and Compatibility
USB 3.0/3.1/3.2 Specification
SuperSpeed USB 3.0, SuperSpeedPlus USB 3.1, 3.2
Configurable PIPE interface width (8, 16, or 32 bits)