SmartDV’s PCIe 6.0 Controller IP delivers high-speed, low-latency data transfer for next-generation computing, storage, and networking applications. Aligned with the PCI Express 6.0 specification, it supports PAM4 signaling, FLIT mode, and forward error correction (FEC) to enable reliable performance at 64 GT/s data rates.

Designed for flexibility, the IP core is highly configurable to meet specific design requirements, supporting both ASIC and FPGA implementations while optimizing for area, power, and performance. With support for multi-lane configurations, advanced power management, and integration across a wide range of host and endpoint use cases, it enables scalable connectivity for high-throughput system designs.