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MIPI SPMI Slave
Design IP
Overview

SmartDV’s MIPI SPMI (System Power Management Interface) Slave IP is a silicon-proven solution tailored for efficient communication with power management controllers in energy-sensitive systems. Fully compliant with the MIPI SPMI specification, it enables fast, reliable data exchange with the master device, supporting precise control of regulators, sensors, and other peripherals across mobile, automotive, and IoT applications.

Designed for flexibility, the IP core is highly configurable to meet specific design requirements, supporting both ASIC and FPGA implementations while optimizing for area, power, and performance. With support for multiple channels, low-latency response, and dynamic slave addressing, the IP ensures seamless integration into complex power management architectures.

Benefits
  • The following frames are supported:
    • Command
    • Data/address
    • No response
  • Slave requests through alert(A) / request(SR) bit
  • Slave request hold
  • Glitch suppression (optional)
  • Extended register read/writes
  • Wakeup command
  • Authentication command sequence
  • Device descriptor block command sequences
Compliance and Compatibility
  • MIPI SPMI Specification 1.0 and 2.0
  • Full MIPI SPMI Slave functionality ACK/NACK (per 2.0 Spec)