JESD204 – SmartDV

JESD204

Simulation VIP

Overview

SmartDV’s JESD204 verification IP provides a simple and efficient way to verify a JESD204A, JESD204B, or JESD204C protocol bus. This VIP operates as RAW/TBI/SERIAL RX/TX and RAW/TBI/SERIAL monitor.

Benefits

Transmitter (TX) and receiver (RX) modes

Up to 32 lanes

32bit data width per converter

Up to 256 converters per transmitter & receiver BFM

8b/10b, 64b/66b, and 64b/80b link layer functions

Forward error correction (FEC), cyclic redundancy checks (CRC), and command channel

Provides error injection and error detection with a wide variety of error types

Includes a complete test suite to verify all features of JESD204

Compliance and Compatibility

JEDEC JESD204A, JESD204B, and JESD204C Specifications

Runs in all major simulation environments

Resources

JEDEC JESD204 Standard